About
I am a Senior Research Fellow in the Particle Physics Group at the University of Liverpool. My background is in instrumentation R&D for physics, specialising in microchip design and evaluation. Currently, my research focuses on three areas: 1) pursuing the deployment of High Voltage CMOS pixel chips in future challenging physics experiments (supported by the £49.5M UKRI Infrastructure Fund awarded to LHCb UK); 2) conducting generic R&D to push the performance boundaries of these sensors (funded through my Future Leaders Fellowship, 2019-26); and 3) increasing their technology readiness level for commercial applications beyond physics (also FLF funded).
I work on the LHCb Upgrade 2 Experiment and on generic R&D within the Solid-State Detectors R&D (DRD3) Collaboration. I am one of the original proposers of the LHCb Upgrade 2 Mighty-Tracker sub-detector, which will use High Voltage CMOS pixels to meet the performance requirements. I serve as co-coordinator of Mighty-Tracker Pixels internationally (2023-present, with seven UK and five German groups), where I oversee the R&D for the High Voltage CMOS pixel chips (MightyPix, and RadPix), off-chip electronics and modules, and plan for the detector’s production phase. I am also the Mighty-Tracker WP leader in LHCb UK (since 2025), where I coordinate the collaborative effort amongst the seven UK groups in this project during the R&D phase and I will do the same again during the production. I facilitated the creation of the new large DRD3 Collaboration (143 institutions, >700 members), and I serve as co-convener of DRD3.1 CMOS (2023-present). I have authored over 60 peer-reviewed publications on detector R&D (over 20 as lead author) and filed several patents to protect my technology. I am an author on all LHCb publications (since 2020). I am on the Scientific Committee for TWEPP (since 2025). I sat on the STFC Early-Stage R&D Scheme Panel (2023-25), and previously on the STFC Innovation Partnership Scheme Panel (2020-22).
I gained my PhD in Engineering and Advanced Technologies on monolithic avalanche photodiode detectors for potential future linear colliders (ILC, CLIC). My postdoc was in design and evaluation of High Voltage CMOS pixel chips for generic R&D with CERN-RD50, and for the ATLAS ITk Upgrade and Mu3e. I initiated and led the CERN-RD50 CMOS Working Group (2017-23, 17 institutions worldwide, 40 collaborators), which delivered the RD50-MPW High Voltage CMOS pixel chip series to boost the performance of these sensors and was aligned to my FLF programme.
Funded Fellowships
- Development of HV-CMOS sensor technology for the next generation of particle physics experiments (UK Research and Innovation, 2019 - 2026)