Module Specification

The information contained in this module specification was correct at the time of publication but may be subject to change, either during the session because of unforeseen circumstances, or following review of the module at the end of the session. Queries about the module should be directed to the member of staff with responsibility for the module.
Title Digital & Integrated Electronics Design
Code ELEC143
Coordinator Dr M Raja
Electrical Engineering and Electronics
M.Raja@liverpool.ac.uk
Year CATS Level Semester CATS Value
Session 2021-22 Level 4 FHEQ Second Semester 15

Aims

This module aims to provide students with knowledge of: number systems such as binary, hexadecimal and BCD, laws of Boolean Algebra, basic design methods for combinational and sequential logic circuits, operation of various silicon electronic devices, to provide students with the opportunity to understand the basic principles of silicon microelectronics design, introduce the subject in the frame of reference of basic design and problem solving, to develop practical skills in the handling and measurement of components and to increase the confidence of the student in undertaking material with a strong analytical and engineering content.


Pre-requisites before taking this module (other modules and/or general educational/academic requirements):

 

Co-requisite modules:

MATH192 MATHEMATICS II FOR ELECTRICAL ENGINEERS; ELEC104 ELECTRONIC CIRCUITS; ELEC142 Electrical Circuits & Systems 

Learning Outcomes

(LO1) Understanding of number systems such as binary, hexadecimal and BCD

(LO2) Knowledge of the laws of Boolean Algebra

(LO3) Knowledge of basic design methods for combinational and sequential logic circuits

(LO4) Understanding of the application of the physical laws of semiconductor to practicle silicon electronic devices such as diodes and transistors

(LO5) Familiarity of the common design rules for development of layouts for the silicon devices and simple circuits

(S1) On successful completion of the module, students should be able to show experience and enhancement of the following key skills: independent learning; problem solving and design skills.

(S2) On successful completion of the module, students should be able to show experience and enhancement of the following discipline -specific practical skills: designing and debugging digital circuits; the handling and measurement of components.

(S3) On successful completion of the module, students should be able to demonstrate ability in applying knowledge of the above topics to: design combination logic circuits with up to 4 inputs; analyse and to design simple sequential logic circuits; an ability to design a simple MOS circuit including tolerance and feature sizes.

(S4) After successful completion of the module, the student should have: a knowledge of basic design methods for combinational and sequential logic circuits; an understanding of number systems such as binary, hexadecimal, BCD; a knowledge of the laws of Boolean algebra; an understanding of how the physical laws of semiconduction apply to practical diodes and transistors; an appreciation of why certain materials are used in devices; a familiarity with common designs of devices, and simple MOS circuits.


Syllabus

 

PART 1: DIGITAL ELECTRONICS DESIGN
Lecture 1 - 2 Introduction: Codes, coding, number systems and arithmetic.
Lecture 3 - 6 Combinational Logic: Basic logic elements, circuit description by truth table and Boolean algebra, design of circuits including the minimisation by Karnaugh map technique.
Lecture 7 -8 Sequential Logic: Basic features of sequential elements including SR and D type.
Lecture 9 - 11 Synchronous Sequential Circuits: Analysis of circuits, state diagrams, design method for synchronous sequential circuits. Lecture 12 More advanced Combinational Logic: Exclusive OR gate, circuit hazards.

PART 2: INTEGRATED ELECTRONICS DESIGN
Lecture 1 - 3 Semiconductors: Electrons in solids, energy bands, intrinsic and extrinsic silicon.
Lecture 4 - 5 Diodes: pn junction fabrication, depletion regions, capacitance, multiplication.
Lecture 6 - 7 MOS Capacitors: Accumulation, depletion and inversion, capacitance.
Lecture 8 - 11 MOS Transistors : Fabrication, operation, design principles and equations, scaling rules and circuits.
Lecture 12 Bipolar Transistors: Minority carriers, pn junctions, bipolar fabrication and operation.


Teaching and Learning Strategies

Due to Covid-19, one or more of the following delivery methods will be implemented based on the current local conditions and the situation of registered students. It is anticipated that both a) & b) will be in operation for semester 1.

(a) Hybrid delivery, with social distancing on Campus
Teaching Method 1 - On-line asynchronous lectures
Description: Lectures to explain the material
Attendance Recorded: No
Notes: On average two per week

Teaching Method 2 - Synchronous face to face tutorials
Description: Tutorials on the Assignments and Problem Sheets
Attendance Recorded: Yes
Notes: On average one per fortnight

Teaching Method 3 - Campus based Laboratory Work Tutorials
Description: Laboratory Sessions (Experiment L)
Attendance Recorded: Yes
Notes: 3 hours of supervised lab per week (6 hours in total)

(b) Fully online delivery and assessment
Teaching Me thod 1 - On-line asynchronous lectures
Description: Lectures to explain the material
Attendance Recorded: No
Notes: On average two per week

Teaching Method 2 - On-line synchronous tutorials
Description: Tutorials on the Assignments and Problem Sheets
Attendance Recorded: Yes
Notes: On average one per fortnight

Teaching Method 3 - on-line Laboratory Work Tutorials
Description: Laboratory Sessions (Experiment L)
Attendance Recorded: Yes
Notes: 3 hours of on-line supervised lab per week where students can contact demonstrators to provide support (6 hours in total)

(c) Standard on-campus delivery with minimal social distancing
Teaching Method 1 - Lecture
Description: Lectures to explain the material
Attendance Recorded: Yes
Notes: On average two per week

Teaching Method 2 - Tutorial
Description: Tutorials on the Assignments and Pr oblem Sheets
Attendance Recorded: Yes
Notes: On average one per fortnight

Teaching Method 3 - Laboratory Work
Description: Laboratory Sessions (Experiment L)
Attendance Recorded: Yes
Notes: 3 hours of supervised lab per week (6 hours in total)


Teaching Schedule

  Lectures Seminars Tutorials Lab Practicals Fieldwork Placement Other TOTAL
Study Hours 24

  12

18

    54
Timetable (if known)              
Private Study 96
TOTAL HOURS 150

Assessment

EXAM Duration Timing
(Semester)
% of
final
mark
Resit/resubmission
opportunity
Penalty for late
submission
Notes
(143) Formal Examination There is a resit opportunity. Standard UoL penalty applies for late submission. This is an anonymous assessment. Assessment Schedule (When) : Semester 2 examnation per    60       
CONTINUOUS Duration Timing
(Semester)
% of
final
mark
Resit/resubmission
opportunity
Penalty for late
submission
Notes
(143.1) Experiment L on Digital Electronics There is a resit opportunity. Standard UoL penalty applies for late submission. This is not an anonymous assessment. Assessment Schedule (When): Sem    10       
(143.2) Design Coursework on Integrated Electronics There is a resit opportunity. Standard UoL penalty applies for late submission. This is not an anonymous assessment. Assessment Schedule (Wh    20       
(143.3) Weekly Online VITAL Tests on Digital Electronics There is a resit opportunity. Standard UoL penalty applies for late submission. This is an anonymous assessment. Assessment Schedule (W    10       

Reading List

Reading lists are managed at readinglists.liverpool.ac.uk. Click here to access the reading lists for this module.